/* this file is automatic generate . Please do not edit it
       ./genpintab.awk gpio_pinmux.csv > <this file name> can generate this file*/
#define AOBUS_REG_ADDR_MASK(a)   AOBUS_REG_ADDR(((a)&0xffff))
#define REG (0x202c)
#define P_GPIO_OEN_0 CBUS_REG_ADDR(0x200c)
#define P_GPIO_OEN_1 CBUS_REG_ADDR(0x200f)
#define P_GPIO_OEN_2 CBUS_REG_ADDR(0x2012)
#define P_GPIO_OEN_3 CBUS_REG_ADDR(0x2015)
#define P_GPIO_OUT_0 CBUS_REG_ADDR(0x200d)
#define P_GPIO_OUT_1 CBUS_REG_ADDR(0x2010)
#define P_GPIO_OUT_2 CBUS_REG_ADDR(0x2013)
#define P_GPIO_OUT_3 CBUS_REG_ADDR(0x2016)
#define P_GPIO_IN_0 CBUS_REG_ADDR(0x200e)
#define P_GPIO_IN_1 CBUS_REG_ADDR(0x2011)
#define P_GPIO_IN_2 CBUS_REG_ADDR(0x2014)
#define P_GPIO_IN_3 CBUS_REG_ADDR(0x2017)
#define REG0 (REG+0)
#define P_PIN_MUX_REG_0 CBUS_REG_ADDR(REG0)
#define REG1 (REG+1)
#define P_PIN_MUX_REG_1 CBUS_REG_ADDR(REG1)
#define REG2 (REG+2)
#define P_PIN_MUX_REG_2 CBUS_REG_ADDR(REG2)
#define REG3 (REG+3)
#define P_PIN_MUX_REG_3 CBUS_REG_ADDR(REG3)
#define REG4 (REG+4)
#define P_PIN_MUX_REG_4 CBUS_REG_ADDR(REG4)
#define REG5 (REG+5)
#define P_PIN_MUX_REG_5 CBUS_REG_ADDR(REG5)
#define REG6 (REG+6)
#define P_PIN_MUX_REG_6 CBUS_REG_ADDR(REG6)
#define REG7 (REG+7)
#define P_PIN_MUX_REG_7 CBUS_REG_ADDR(REG7)
#define REG8 (REG+8)
#define P_PIN_MUX_REG_8 CBUS_REG_ADDR(REG8)
#define REG9 (REG+9)
#define P_PIN_MUX_REG_9 CBUS_REG_ADDR(REG9)
#define REG10 (REG+10)
#define P_PIN_MUX_REG_10 CBUS_REG_ADDR(REG10)
#define REG11 (REG+11)
#define P_PIN_MUX_REG_11 CBUS_REG_ADDR(REG11)
#define P_GPIO_OUT(base,bit) (bit+(base<<5))
#define P_GPIO_OUT_NUM (sizeof(p_gpio_out_addr)/sizeof(p_gpio_out_addr[0]))
static unsigned p_gpio_out_addr[]={
	P_GPIO_OUT_0,
	P_GPIO_OUT_1,
	P_GPIO_OUT_2,
	P_GPIO_OUT_3,
};
#define P_GPIO_IN(base,bit) (bit+(base<<5))
#define P_GPIO_IN_NUM (sizeof(p_gpio_in_addr)/sizeof(p_gpio_in_addr[0]))
static unsigned p_gpio_in_addr[]={
	P_GPIO_IN_0,
	P_GPIO_IN_1,
	P_GPIO_IN_2,
	P_GPIO_IN_3,
};
#define P_GPIO_OEN(base,bit) (bit+(base<<5))
#define P_GPIO_OEN_NUM (sizeof(p_gpio_oen_addr)/sizeof(p_gpio_oen_addr[0]))
static unsigned p_gpio_oen_addr[]={
	P_GPIO_OEN_0,
	P_GPIO_OEN_1,
	P_GPIO_OEN_2,
	P_GPIO_OEN_3,
};
#define P_PIN_MUX_REG(base,bit) (bit+(base<<5))
#define P_PIN_MUX_REG_NUM (sizeof(p_pin_mux_reg_addr)/sizeof(p_pin_mux_reg_addr[0]))
static unsigned p_pin_mux_reg_addr[]={
	P_PIN_MUX_REG_0,
	P_PIN_MUX_REG_1,
	P_PIN_MUX_REG_2,
	P_PIN_MUX_REG_3,
	P_PIN_MUX_REG_4,
	P_PIN_MUX_REG_5,
	P_PIN_MUX_REG_6,
	P_PIN_MUX_REG_7,
	P_PIN_MUX_REG_8,
	P_PIN_MUX_REG_9,
	P_PIN_MUX_REG_10,
	P_PIN_MUX_REG_11,
};
#define NOT_EXIST -1
struct pad_sig {pad_t pad;sig_t sig;unsigned enable; unsigned disable;};
#define foreach_pad_sig_start(pad,sig) {int __i;for(__i=0;__i<sizeof(pad_sig_tab)/sizeof(pad_sig_tab[0]);__i++){ unsigned __pad=pad,__sig=sig;  
#define case_pad_equal(enable,disable) if(pad_sig_tab[__i].pad==__pad&&pad_sig_tab[__i].sig!=__sig){ enable=pad_sig_tab[__i].enable;disable=pad_sig_tab[__i].disable
#define case_sig_equal(enable,disable) if(pad_sig_tab[__i].pad!=__pad&&pad_sig_tab[__i].sig==__sig){enable=pad_sig_tab[__i].enable;disable=pad_sig_tab[__i].disable
#define case_both_equal(enable,disable) if(pad_sig_tab[__i].pad==__pad&&pad_sig_tab[__i].sig==__sig){enable=pad_sig_tab[__i].enable;disable=pad_sig_tab[__i].disable
#define case_end };
#define foreach_pad_sig_end };}
static struct pad_sig pad_sig_tab[]={
	{.pad=PAD_GPIOX_50,.sig=SIG_RMII_TX_EN,.enable=reg3,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_26,.sig=SIG_NAND_IO_7,.enable=reg5,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_6,.sig=SIG_LCD_R4,.enable=regt7,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_49,.sig=SIG_ISO7816_DET,.enable=reg1,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_34,.sig=SIG_STV2,.enable=reg0,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_SPI_HOLD_A,.enable=reg2,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_15,.sig=SIG_LCD_G5,.enable=regt7,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_64,.sig=SIG_FEC_D4_B,.enable=reg2,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_52,.sig=SIG_ADC_2,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_5,.sig=SIG_NAND_CE2,.enable=reg5(14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_21,.sig=SIG_NAND_IO_2,.enable=reg5,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_60,.sig=SIG_ADC_CLK,.enable=,.disable=},
	{.pad=PAD_GPIOX_54,.sig=SIG_ADC_4,.enable=,.disable=},
	{.pad=PAD_GPIOX_30,.sig=SIG_SPI_Q_B,.enable=reg4,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_22,.sig=SIG_out_3,.enable=reg7,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_63,.sig=SIG_ITU601_D3,.enable=reg4,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_2,.sig=SIG_I2C_SDA_B,.enable=reg1,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_47,.sig=SIG_FEC_D0_A,.enable=reg2,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_14,.sig=SIG_SPI_D_A,.enable=reg2,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_10,.sig=SIG_LCD_R0,.enable=regt7,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_39,.sig=SIG_RGB_DE,.enable=reg6,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_52,.sig=SIG_FEC_D5_A,.enable=reg2,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_3,.sig=SIG_TCON_CPV1,.enable=reg0,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_50,.sig=SIG_ISO7816_DATA,.enable=reg1,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_37,.sig=SIG_RGB_VS,.enable=reg6,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_RGB_G1,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_27,.sig=SIG_I2C_SDA_A,.enable=reg1,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_34,.sig=SIG_SPI_Q_A,.enable=reg2,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_30,.sig=SIG_PWM_B,.enable=reg1,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_59,.sig=SIG_ENC_8,.enable=reg7,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_40,.sig=SIG_RGB_CLK,.enable=reg6,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_36,.sig=SIG_SPI_W_A,.enable=reg1,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_57,.sig=SIG_FEC_FAIL_B,.enable=reg2,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_53,.sig=SIG_ADC_3,.enable=,.disable=},
	{.pad=PAD_GPIOX_38,.sig=SIG_I2S_AOCLK,.enable=reg6,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_38,.sig=SIG_audin_aoclk,.enable=reg4,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_SD_CMD_C,.enable=reg2,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_61,.sig=SIG_FEC_D1_B,.enable=reg2,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_65,.sig=SIG_ENC_2,.enable=reg7,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_27,.sig=SIG_LCD_B3,.enable=regt7,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_62,.sig=SIG_RMII_TX_DATA1,.enable=reg3,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_56,.sig=SIG_ENC_11,.enable=reg7,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_48,.sig=SIG_ITU601_D1,.enable=reg4,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_42,.sig=SIG_adc0,.enable=,.disable=},
	{.pad=PAD_GPIOX_11,.sig=SIG_RGB_G9,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_3,.sig=SIG_I2C_SCK_B,.enable=reg1,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_43,.sig=SIG_PWM_A,.enable=reg10,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_6,.sig=SIG_RGB_R4,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_39,.sig=SIG_I2S_LRCLK,.enable=reg6,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_52,.sig=SIG_ADC_2,.enable=,.disable=},
	{.pad=PAD_GPIOX_23,.sig=SIG_NAND_IO_4,.enable=reg5,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_15,.sig=SIG_RGB_G5,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_68,.sig=SIG_RMII_CLK50_OUT,.enable=reg3,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_61,.sig=SIG_RMII_TX_DATA0,.enable=reg3,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_33,.sig=SIG_CPV2,.enable=reg0,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_57,.sig=SIG_ITU601_HS,.enable=reg4,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_66,.sig=SIG_RMII_RX_CRS_DV,.enable=reg3,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_6,.sig=SIG_REMOTE,.enable=reg10,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_61,.sig=SIG_ENC_6,.enable=reg7,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_54,.sig=SIG_ITU601_D7,.enable=reg4,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_10,.sig=SIG_RGB_R0,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_65,.sig=SIG_UART_TX_A,.enable=reg1,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_23,.sig=SIG_LCD_B7,.enable=regt7,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_52,.sig=SIG_ENC_15,.enable=reg7,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_51,.sig=SIG_ADC_1,.enable=,.disable=},
	{.pad=PAD_GPIOX_39,.sig=SIG_JTAG_TDI,.enable=reg1,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_23,.sig=SIG_RGB_B7,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_8,.sig=SIG_AGC_RF,.enable=,.disable=},
	{.pad=PAD_GPIOX_66,.sig=SIG_UART_RX_A,.enable=reg1,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_57,.sig=SIG_ADC_7,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_58,.sig=SIG_ITU601_VS,.enable=reg4,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_65,.sig=SIG_RMII_RX_DATA1,.enable=reg3,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_24,.sig=SIG_out_5,.enable=reg7,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_21,.sig=SIG_TS_D7_A,.enable=reg4,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_45,.sig=SIG_RMII_CLK50_IN,.enable=reg3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_2,.sig=SIG_RGB_R8,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_35,.sig=SIG_OEV2,.enable=reg0,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_39,.sig=SIG_SD_D2_B,.enable=reg0,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_8,.sig=SIG_VGA_DDC_SCK_1,.enable=reg6,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_27,.sig=SIG_RGB_B3,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_4,.sig=SIG_hdmi_rx1_ddc_scl,.enable=reg6,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_NAND_RB0,.enable=reg5,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_50,.sig=SIG_ADC_0,.enable=,.disable=},
	{.pad=PAD_GPIOX_8,.sig=SIG_PWM_D,.enable=reg5,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_16,.sig=SIG_LCD_G4,.enable=regt7,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_SD_D0_C,.enable=reg2,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_30,.sig=SIG_I2C_SCK_B,.enable=reg1,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_TS_D4_A,.enable=reg4,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_37,.sig=SIG_SD_D0_B,.enable=reg0,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_28,.sig=SIG_I2C_SCK_A,.enable=reg1,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_64,.sig=SIG_RMII_RX_DATA0,.enable=reg3,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_65,.sig=SIG_ITU601_D5,.enable=reg4,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_6,.sig=SIG_NAND_CE3,.enable=reg5,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_2,.sig=SIG_TCON_OEH,.enable=reg0,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_11,.sig=SIG_TS_FAIL_A,.enable=reg4,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_51,.sig=SIG_ISO7816_CLK,.enable=reg1,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_16,.sig=SIG_TS_D2_A,.enable=reg4,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_39,.sig=SIG_SPI_D_B,.enable=reg4,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_6,.sig=SIG_TCON_CPH2,.enable=reg0,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_60,.sig=SIG_ITU601_D0,.enable=reg4,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_6,.sig=SIG_JTAG_TMS,.enable=reg1,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_NAND_IO_0,.enable=reg5,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_3,.sig=SIG_LCD_R7,.enable=regt7(1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_37,.sig=SIG_I2S_AMCLK,.enable=reg6,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_41,.sig=SIG_SD_CLK_B,.enable=reg0,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_67,.sig=SIG_RMII_RX_ERR,.enable=reg3,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_54,.sig=SIG_ADC_4,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_28,.sig=SIG_LCD_B2,.enable=regt7,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_30,.sig=SIG_LCD_B0,.enable=regt7,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_22,.sig=SIG_SD_D3_C,.enable=reg2,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_40,.sig=SIG_JTAG_TDO,.enable=reg1,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_40,.sig=SIG_SD_D3_B,.enable=reg0,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_30,.sig=SIG_RGB_B0,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_28,.sig=SIG_SPI_C_B,.enable=reg4,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_7,.sig=SIG_LCD_R3,.enable=regt7,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_46,.sig=SIG_ITU601_CLK,.enable=reg4,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_42,.sig=SIG_adc0,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_5,.sig=SIG_PWM_A,.enable=reg5,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_1,.sig=SIG_hdmi_rx0_ddc_scda,.enable=reg6,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_66,.sig=SIG_ENC_1,.enable=reg7,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_7,.sig=SIG_RGB_R3,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_SD_D1_C,.enable=reg2,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_65,.sig=SIG_FEC_D5_B,.enable=reg2,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_4,.sig=SIG_REMOTE,.enable=reg10,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_16,.sig=SIG_RGB_G4,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_25,.sig=SIG_NAND_IO_6,.enable=reg5,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_4,.sig=SIG_VGA_DDC_SCK_0,.enable=reg6,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_44,.sig=SIG_FEC_FAIL_A,.enable=reg2,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_48,.sig=SIG_FEC_D1_A,.enable=reg2,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_60,.sig=SIG_ADC_CLK,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_53,.sig=SIG_FEC_D6_A,.enable=reg2,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_41,.sig=SIG_SPDIF_OUT,.enable=reg10,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_NAND_IO_1,.enable=reg5,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_24,.sig=SIG_LCD_B6,.enable=regt7,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_53,.sig=SIG_ENC_14,.enable=reg7,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_6,.sig=SIG_VGA_VS_1,.enable=reg6,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_58,.sig=SIG_FEC_SOP_B,.enable=reg2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_33,.sig=SIG_SD_D2_A,.enable=reg0,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_51,.sig=SIG_ADC_1,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_27,.sig=SIG_UART_TX_B,.enable=reg1(9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_62,.sig=SIG_ENC_5,.enable=reg7,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_59,.sig=SIG_ITU601_CLK,.enable=reg4,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_8,.sig=SIG_AGC_RF,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_51,.sig=SIG_ITU601_D4,.enable=reg4,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_21,.sig=SIG_out_2,.enable=reg7,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_62,.sig=SIG_FEC_D2_B,.enable=reg2,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_7,.sig=SIG_TCON_VCOM,.enable=reg0,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_3,.sig=SIG_RGB_R7,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_14,.sig=SIG_TS_D0_A,.enable=reg4,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_57,.sig=SIG_ENC_10,.enable=reg7,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_28,.sig=SIG_UART_RX_B,.enable=reg1,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_0,.sig=SIG_hdmi_rx_cec,.enable=reg6,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_12,.sig=SIG_RGB_G8,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_28,.sig=SIG_RGB_B2,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_31,.sig=SIG_SD_D0_A,.enable=reg0(15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_46,.sig=SIG_RMII_MDIO,.enable=reg3,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_LCD_G3,.enable=regt7,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_37,.sig=SIG_JTAG_TCK,.enable=reg1,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_50,.sig=SIG_FEC_D3_A,.enable=reg2,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_45,.sig=SIG_FEC_SOP_A,.enable=reg2,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_39,.sig=SIG_audin_lrclk,.enable=reg4,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_NAND_RB1,.enable=reg5,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_0,.sig=SIG_TCON_STH1,.enable=reg0,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_36,.sig=SIG_SD_CMD_A,.enable=reg0,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_33,.sig=SIG_SPI_D_A,.enable=reg2,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_11,.sig=SIG_NAND_ALE,.enable=reg5,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_67,.sig=SIG_ITU601_D7,.enable=reg4,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_59,.sig=SIG_ADC_9,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_26,.sig=SIG_out_7,.enable=reg7,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_8,.sig=SIG_JTAG_TDO,.enable=reg1,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_43,.sig=SIG_FEC_D_VALID_A,.enable=reg2,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_8,.sig=SIG_hdmi_rx1_hpd,.enable=reg3,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_3,.sig=SIG_hdmi_rx1_ddc_scda,.enable=reg6,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_36,.sig=SIG_OEV3,.enable=reg0,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_SD_CLK_C,.enable=reg2,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_5,.sig=SIG_hdmi_rx0_pwr,.enable=reg3(31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_27,.sig=SIG_SPI_CS_n_B,.enable=reg4,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_9,.sig=SIG_SPDIF_IN,.enable=reg4,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_9,.sig=SIG_hdmi_rx2_pwr,.enable=reg3,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_64,.sig=SIG_ISO7816_CLK,.enable=reg0,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_5,.sig=SIG_VGA_HS_1,.enable=reg6,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_62,.sig=SIG_ITU601_D2,.enable=reg4,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_24,.sig=SIG_RGB_B6,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_11,.sig=SIG_SPI_W_A,.enable=reg2(12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_13,.sig=SIG_LCD_G7,.enable=regt7,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_63,.sig=SIG_ISO7816_DATA,.enable=reg0,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_42,.sig=SIG_SPI_W_B,.enable=reg4,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_8,.sig=SIG_LCD_R2,.enable=regt7,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_2,.sig=SIG_VGA_VS_0,.enable=reg6,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_7,.sig=SIG_NAND_RB2,.enable=reg5,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_51,.sig=SIG_RMII_RX_DATA0,.enable=reg3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_14,.sig=SIG_NAND_REn_WR,.enable=reg5,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_RGB_G3,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_2,.sig=SIG_hdmi_rx0_ddc_scl,.enable=reg6,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_47,.sig=SIG_ITU601_D0,.enable=reg4,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_45,.sig=SIG_RMII_CLK50_OUT,.enable=reg3,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_56,.sig=SIG_ADC_6,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_13,.sig=SIG_SPI_C_A,.enable=reg2,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_38,.sig=SIG_JTAG_TMS,.enable=reg1,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_23,.sig=SIG_out_4,.enable=reg7,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_25,.sig=SIG_LCD_B5,.enable=regt7,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_22,.sig=SIG_NAND_IO_3,.enable=reg5,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_43,.sig=SIG_adc1,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_7,.sig=SIG_PWM_C,.enable=reg5,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_52,.sig=SIG_RMII_RX_DATA1,.enable=reg3,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_55,.sig=SIG_PWM_B,.enable=reg1,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_4,.sig=SIG_LCD_R6,.enable=regt7,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_1,.sig=SIG_TCON_STV1,.enable=reg0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_12,.sig=SIG_NAND_CLE,.enable=reg5,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_68,.sig=SIG_RMII_CLK50_IN,.enable=reg3,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_53,.sig=SIG_ITU601_D6,.enable=reg4,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_29,.sig=SIG_LCD_B1,.enable=regt7,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_4,.sig=SIG_RGB_R6,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_TS_D5_A,.enable=reg4,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_40,.sig=SIG_SPI_Q_B,.enable=reg4,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_5,.sig=SIG_hdmi_rx2_ddc_scda,.enable=reg6,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_7,.sig=SIG_AGC_IF,.enable=,.disable=},
	{.pad=PAD_GPIOX_19,.sig=SIG_out_0,.enable=reg7(24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_13,.sig=SIG_RGB_G7,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_29,.sig=SIG_RGB_B1,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_31,.sig=SIG_CPH3,.enable=reg0,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_12,.sig=SIG_SPI_Q_A,.enable=reg2,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_29,.sig=SIG_I2C_SDA_B,.enable=reg1,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_63,.sig=SIG_ENC_4,.enable=reg7,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_LCD_G0,.enable=regt7,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_1,.sig=SIG_VGA_HS_0,.enable=reg6(15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_8,.sig=SIG_RGB_R2,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_66,.sig=SIG_FEC_D6_B,.enable=reg2,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_41,.sig=SIG_SPI_HOLD_B,.enable=reg4,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_68,.sig=SIG_PWM_A,.enable=reg1,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_49,.sig=SIG_ITU601_D2,.enable=reg4,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_48,.sig=SIG_ISO7816_RESET,.enable=reg1,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_50,.sig=SIG_ENC_17,.enable=reg7,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_53,.sig=SIG_ADC_3,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_67,.sig=SIG_ENC_0,.enable=reg7,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_49,.sig=SIG_FEC_D2_A,.enable=reg2,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_54,.sig=SIG_FEC_D7_A,.enable=reg2,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_68,.sig=SIG_ITU601_IDQ,.enable=reg4,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_5,.sig=SIG_UART_TX_A,.enable=reg4,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_54,.sig=SIG_ENC_13,.enable=reg7,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_29,.sig=SIG_SPI_D_B,.enable=reg4,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_59,.sig=SIG_ADC_9,.enable=,.disable=},
	{.pad=PAD_GPIOX_64,.sig=SIG_ITU601_D4,.enable=reg4,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_25,.sig=SIG_RGB_B5,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_6,.sig=SIG_UART_RX_A,.enable=reg4,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_7,.sig=SIG_AGC_IF,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_55,.sig=SIG_ITU601_IDQ,.enable=reg4,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_14,.sig=SIG_LCD_G6,.enable=regt7,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_56,.sig=SIG_ITU601_FIR,.enable=reg4,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_63,.sig=SIG_FEC_D3_B,.enable=reg2,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_15,.sig=SIG_NAND_CE0,.enable=reg5,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_TS_D6_A,.enable=reg4,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_5,.sig=SIG_TCON_CPH1,.enable=reg0,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_38,.sig=SIG_SD_D1_B,.enable=reg0,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_59,.sig=SIG_RMII_MDIO,.enable=reg3,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_13,.sig=SIG_NAND_WEn_CLK,.enable=reg5,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_8,.sig=SIG_AGC_RF,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_9,.sig=SIG_LCD_R1,.enable=regt7,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_10,.sig=SIG_TS_D_VALID_A,.enable=reg4,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_43,.sig=SIG_ITU601_FIR,.enable=reg4,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_32,.sig=SIG_STH2,.enable=reg0,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_LCD_G2,.enable=regt7,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_58,.sig=SIG_ADC_8,.enable=,.disable=},
	{.pad=PAD_GPIOX_50,.sig=SIG_ITU601_D3,.enable=reg4,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_51,.sig=SIG_FEC_D4_A,.enable=reg2,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_7,.sig=SIG_VGA_DDC_SDA_1,.enable=reg6,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_62,.sig=SIG_ISO7816_DET,.enable=reg0,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_55,.sig=SIG_RMII_CLK50_OUT,.enable=reg3,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_9,.sig=SIG_NAND_DQS,.enable=reg5,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_TS_D3_A,.enable=reg4,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_RGB_G0,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_8,.sig=SIG_NAND_RB3,.enable=reg5,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_44,.sig=SIG_PWM_B,.enable=reg10,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_53,.sig=SIG_RMII_RX_CRS_DV,.enable=reg3,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_50,.sig=SIG_ADC_0,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_34,.sig=SIG_SD_D3_A,.enable=reg0,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_10,.sig=SIG_NAND_WP_n,.enable=reg5,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_out_1,.enable=reg7,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_21,.sig=SIG_RGB_B9,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_3,.sig=SIG_VGA_DDC_SDA_0,.enable=reg6,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_6,.sig=SIG_hdmi_rx2_ddc_scl,.enable=reg6,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_60,.sig=SIG_FEC_D0_B,.enable=reg2,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_15,.sig=SIG_TS_D1_A,.enable=reg4,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_38,.sig=SIG_SPI_C_B,.enable=reg4,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_57,.sig=SIG_ADC_7,.enable=,.disable=},
	{.pad=PAD_GPIOB_7,.sig=SIG_JTAG_TDI,.enable=reg1,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_42,.sig=SIG_I2S_OUT_CH4_CH5,.enable=reg6,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_24,.sig=SIG_NAND_IO_5,.enable=reg5,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_5,.sig=SIG_JTAG_TCL,.enable=reg1,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_43,.sig=SIG_I2S_OUT_CH6_CH7,.enable=reg6,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_31,.sig=SIG_SPI_CS_A,.enable=reg2,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_5,.sig=SIG_LCD_R5,.enable=regt7,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_66,.sig=SIG_ITU601_D6,.enable=reg4,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_37,.sig=SIG_SPI_CS_B,.enable=reg4,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_58,.sig=SIG_RMII_CLK50_IN,.enable=reg3,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_0,.sig=SIG_UART_TX_B,.enable=reg2,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_7,.sig=SIG_I2C_SDA_A,.enable=reg5,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_9,.sig=SIG_SPDIF_OUT,.enable=reg4(30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_10,.sig=SIG_SPDIF_OUT,.enable=reg10(1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_42,.sig=SIG_I2S_IN_CH0_CH1,.enable=reg4,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_21,.sig=SIG_SD_D2_C,.enable=reg2,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_60,.sig=SIG_ENC_7,.enable=reg7,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_56,.sig=SIG_FEC_D_VALID_B,.enable=reg2,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_1,.sig=SIG_UART_RX_B,.enable=reg2,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_14,.sig=SIG_RGB_G6,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_58,.sig=SIG_ADC_8,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_49,.sig=SIG_RMII_TX_DATA1,.enable=reg3,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_61,.sig=SIG_ITU601_D1,.enable=reg4,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_25,.sig=SIG_out_6,.enable=reg7,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_56,.sig=SIG_ADC_6,.enable=,.disable=},
	{.pad=PAD_GPIOX_35,.sig=SIG_SD_CLK_A,.enable=reg0,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_58,.sig=SIG_ENC_9,.enable=reg7,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_9,.sig=SIG_RGB_R1,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_44,.sig=SIG_ITU601_HS,.enable=reg4,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_12,.sig=SIG_TS_SOP_A,.enable=reg4,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_RGB_G2,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_64,.sig=SIG_ENC_3,.enable=reg7,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_52,.sig=SIG_UART_TX_A,.enable=reg0,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_38,.sig=SIG_RGB_HS,.enable=reg6,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_48,.sig=SIG_RMII_TX_DATA0,.enable=reg3,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_8,.sig=SIG_PWMC,.enable=reg4,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_53,.sig=SIG_UART_RX_A,.enable=reg0,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_26,.sig=SIG_LCD_B4,.enable=regt7,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_1,.sig=SIG_RGB_R9,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_41,.sig=SIG_I2S_OUT_CH2_CH3,.enable=reg6,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_55,.sig=SIG_ENC_12,.enable=reg7,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_46,.sig=SIG_FEC_CLK_A,.enable=reg2,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_55,.sig=SIG_RMII_CLK50_IN,.enable=reg3,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_45,.sig=SIG_ITU601_VS,.enable=reg4,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_11,.sig=SIG_REMOTE,.enable=reg4,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_26,.sig=SIG_RGB_B4,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_32,.sig=SIG_SD_D1_A,.enable=reg0,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_42,.sig=SIG_SD_CMD_B,.enable=reg0,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_35,.sig=SIG_SPI_HOLD_A,.enable=reg1,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_29,.sig=SIG_PWM_A,.enable=reg1,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_16,.sig=SIG_SPI_CS_n_A,.enable=reg2,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_5,.sig=SIG_RGB_R5,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_61,.sig=SIG_ISO7816_RESET,.enable=reg0,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_55,.sig=SIG_ADC_5,.enable=,.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_41,.sig=SIG_REMOTE,.enable=reg10,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_16,.sig=SIG_NAND_CE1,.enable=reg5,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_58,.sig=SIG_RMII_CLK50_OUT,.enable=reg3,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_LCD_G1,.enable=regt7,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_59,.sig=SIG_FEC_CLK_B,.enable=reg2,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_60,.sig=SIG_RMII_MDC,.enable=reg3,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_52,.sig=SIG_ITU601_D5,.enable=reg4,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_6,.sig=SIG_PWM_B,.enable=reg5,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_67,.sig=SIG_FEC_D7_B,.enable=reg2,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_6,.sig=SIG_hdmi_rx0_hpd,.enable=reg3,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_32,.sig=SIG_SPI_C_A,.enable=reg2,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_47,.sig=SIG_RMII_MDC,.enable=reg3,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_10,.sig=SIG_hdmi_rx2_hpd,.enable=reg3,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_51,.sig=SIG_ENC_16,.enable=reg7,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_54,.sig=SIG_RMII_RX_ERR,.enable=reg3,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_37,.sig=SIG_audin_AMCLK,.enable=reg4,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_7,.sig=SIG_hdmi_rx1_pwr,.enable=reg3,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_63,.sig=SIG_RMII_TX_EN,.enable=reg3,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_43,.sig=SIG_adc1,.enable=,.disable=},
	{.pad=PAD_GPIOX_22,.sig=SIG_RGB_B8,.enable=reg6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_55,.sig=SIG_ADC_5,.enable=,.disable=},
	{.pad=PAD_GPIOX_13,.sig=SIG_TS_CLK_A,.enable=reg4,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_8,.sig=SIG_I2C_SCK_A,.enable=reg5,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_40,.sig=SIG_I2S_OUT_CH0_CH1,.enable=reg6,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_4,.sig=SIG_TCON_OEV1,.enable=reg0,3),.disable=NOT_EXIST},
};
static const char * pad_name[]={
	[79]="GPIOD_0",
	[80]="GPIOD_1",
	[81]="GPIOD_2",
	[82]="GPIOD_3",
	[9]="GPIOX_10",
	[83]="GPIOD_4",
	[10]="GPIOX_11",
	[84]="GPIOD_5",
	[11]="GPIOX_12",
	[85]="GPIOD_6",
	[12]="GPIOX_13",
	[13]="GPIOX_14",
	[14]="GPIOX_15",
	[15]="GPIOX_16",
	[16]="GPIOX_17",
	[29]="GPIOX_30",
	[17]="GPIOX_18",
	[30]="GPIOX_31",
	[31]="GPIOX_32",
	[18]="GPIOX_19",
	[32]="GPIOX_33",
	[33]="GPIOX_34",
	[34]="GPIOX_35",
	[35]="GPIOX_36",
	[49]="GPIOX_50",
	[36]="GPIOX_37",
	[50]="GPIOX_51",
	[37]="GPIOX_38",
	[51]="GPIOX_52",
	[38]="GPIOX_39",
	[52]="GPIOX_53",
	[53]="GPIOX_54",
	[54]="GPIOX_55",
	[55]="GPIOX_56",
	[69]="GPIOX_70",
	[56]="GPIOX_57",
	[57]="GPIOX_58",
	[58]="GPIOX_59",
	[0]="GPIOX_1",
	[1]="GPIOX_2",
	[2]="GPIOX_3",
	[3]="GPIOX_4",
	[4]="GPIOX_5",
	[5]="GPIOX_6",
	[6]="GPIOX_7",
	[7]="GPIOX_8",
	[8]="GPIOX_9",
	[19]="GPIOX_20",
	[70]="GPIOB_0",
	[20]="GPIOX_21",
	[71]="GPIOB_1",
	[21]="GPIOX_22",
	[72]="GPIOB_2",
	[22]="GPIOX_23",
	[73]="GPIOB_3",
	[23]="GPIOX_24",
	[74]="GPIOB_4",
	[24]="GPIOX_25",
	[75]="GPIOB_5",
	[25]="GPIOX_26",
	[76]="GPIOB_6",
	[39]="GPIOX_40",
	[26]="GPIOX_27",
	[77]="GPIOB_7",
	[40]="GPIOX_41",
	[27]="GPIOX_28",
	[78]="GPIOB_8",
	[41]="GPIOX_42",
	[28]="GPIOX_29",
	[42]="GPIOX_43",
	[43]="GPIOX_44",
	[44]="GPIOX_45",
	[45]="GPIOX_46",
	[59]="GPIOX_60",
	[46]="GPIOX_47",
	[60]="GPIOX_61",
	[47]="GPIOX_48",
	[61]="GPIOX_62",
	[48]="GPIOX_49",
	[62]="GPIOX_63",
	[63]="GPIOX_64",
	[64]="GPIOX_65",
	[65]="GPIOX_66",
	[66]="GPIOX_67",
	[67]="GPIOX_68",
	[68]="GPIOX_69",
	[PAD_MAX_PADS]=NULL
};
static const char * sig_name[]={
	[203]="ITU601_D3",
	[134]="RGB_B1",
	[208]="ITU601_D4",
	[130]="RGB_B2",
	[214]="ITU601_D5",
	[125]="RGB_B3",
	[75]="TS_D3_A",
	[219]="ITU601_D6",
	[175]="I2S_OUT_CH4_CH5",
	[119]="RGB_B4",
	[46]="SPI_W_A",
	[223]="ITU601_D7",
	[181]="ITU601_FIR",
	[177]="SPI_W_B",
	[145]="CPV2",
	[115]="RGB_B5",
	[111]="RGB_B6",
	[226]="ITU601_IDQ",
	[107]="RGB_B7",
	[79]="SPI_HOLD_A",
	[173]="SPI_HOLD_B",
	[103]="RGB_B8",
	[213]="FEC_D5_A",
	[99]="RGB_B9",
	[246]="FEC_D5_B",
	[56]="TS_CLK_A",
	[43]="LCD_R0",
	[38]="LCD_R1",
	[32]="LCD_R2",
	[26]="LCD_R3",
	[164]="audin_lrclk",
	[148]="SD_CLK_A",
	[20]="LCD_R4",
	[251]="ENC_0",
	[174]="SD_CLK_B",
	[73]="NAND_RB0",
	[14]="LCD_R5",
	[249]="ENC_1",
	[217]="UART_RX_A",
	[149]="OEV2",
	[78]="NAND_RB1",
	[74]="SD_CLK_C",
	[8]="LCD_R6",
	[247]="ENC_2",
	[204]="RMII_TX_EN",
	[180]="FEC_D_VALID_A",
	[151]="OEV3",
	[127]="UART_RX_B",
	[5]="LCD_R7",
	[22]="NAND_RB2",
	[245]="ENC_3",
	[228]="FEC_D_VALID_B",
	[123]="I2C_SDA_A",
	[28]="NAND_RB3",
	[243]="ENC_4",
	[132]="I2C_SDA_B",
	[48]="TS_FAIL_A",
	[253]="TCON_STV1",
	[241]="ENC_5",
	[239]="ENC_6",
	[59]="NAND_REn_WR",
	[237]="ENC_7",
	[13]="hdmi_rx0_pwr",
	[235]="ENC_8",
	[194]="FEC_D1_A",
	[268]="hdmi_rx2_ddc_scda",
	[238]="FEC_D1_B",
	[233]="ENC_9",
	[159]="audin_aoclk",
	[156]="JTAG_TCK",
	[257]="JTAG_TCL",
	[25]="hdmi_rx1_pwr",
	[167]="RGB_DE",
	[36]="NAND_DQS",
	[262]="AGC_RF",
	[140]="SD_D0_A",
	[81]="TS_D4_A",
	[4]="VGA_DDC_SDA_0",
	[155]="SD_D0_B",
	[24]="VGA_DDC_SDA_1",
	[220]="RMII_RX_CRS_DV",
	[85]="SD_D0_C",
	[50]="NAND_CLE",
	[93]="LCD_G0",
	[89]="out_0",
	[218]="FEC_D6_A",
	[190]="RMII_MDIO",
	[95]="out_1",
	[87]="LCD_G1",
	[255]="TCON_CPV1",
	[254]="TCON_OEH",
	[248]="FEC_D6_B",
	[100]="out_2",
	[82]="LCD_G2",
	[104]="out_3",
	[76]="LCD_G3",
	[108]="out_4",
	[71]="LCD_G4",
	[112]="out_5",
	[66]="LCD_G5",
	[116]="out_6",
	[62]="LCD_G6",
	[209]="RMII_RX_DATA0",
	[153]="audin_AMCLK",
	[120]="out_7",
	[57]="LCD_G7",
	[215]="RMII_RX_DATA1",
	[171]="RGB_CLK",
	[179]="I2S_OUT_CH6_CH7",
	[61]="TS_D0_A",
	[183]="ITU601_HS",
	[158]="I2S_AOCLK",
	[37]="hdmi_rx2_pwr",
	[184]="FEC_SOP_A",
	[263]="hdmi_rx_cec",
	[261]="PWMC",
	[232]="FEC_SOP_B",
	[256]="TCON_OEV1",
	[196]="RMII_TX_DATA0",
	[64]="NAND_CE0",
	[201]="ISO7816_DET",
	[200]="RMII_TX_DATA1",
	[198]="FEC_D2_A",
	[68]="NAND_CE1",
	[240]="FEC_D2_B",
	[163]="I2S_LRCLK",
	[10]="NAND_CE2",
	[16]="NAND_CE3",
	[162]="RGB_HS",
	[44]="RGB_R0",
	[39]="RGB_R1",
	[128]="I2C_SCK_A",
	[33]="RGB_R2",
	[142]="SD_D1_A",
	[136]="I2C_SCK_B",
	[86]="TS_D5_A",
	[27]="RGB_R3",
	[34]="SPDIF_OUT",
	[160]="SD_D1_B",
	[150]="SD_CMD_A",
	[21]="RGB_R4",
	[178]="SD_CMD_B",
	[91]="SD_D1_C",
	[15]="RGB_R5",
	[80]="SD_CMD_C",
	[9]="RGB_R6",
	[168]="I2S_OUT_CH0_CH1",
	[6]="RGB_R7",
	[264]="hdmi_rx0_ddc_scda",
	[197]="ISO7816_RESET",
	[3]="RGB_R8",
	[222]="FEC_D7_A",
	[1]="RGB_R9",
	[250]="FEC_D7_B",
	[143]="STH2",
	[69]="SPI_CS_n_A",
	[121]="SPI_CS_n_B",
	[161]="JTAG_TMS",
	[7]="VGA_DDC_SCK_0",
	[30]="VGA_DDC_SCK_1",
	[0]="VGA_HS_0",
	[231]="ENC_10",
	[47]="REMOTE",
	[12]="VGA_HS_1",
	[229]="ENC_11",
	[152]="I2S_AMCLK",
	[227]="ENC_12",
	[193]="RMII_MDC",
	[65]="TS_D1_A",
	[225]="ENC_13",
	[221]="ENC_14",
	[176]="I2S_IN_CH0_CH1",
	[216]="ENC_15",
	[211]="ENC_16",
	[19]="hdmi_rx0_hpd",
	[206]="ENC_17",
	[55]="SPI_C_A",
	[202]="FEC_D3_A",
	[126]="SPI_C_B",
	[260]="TCON_VCOM",
	[242]="FEC_D3_B",
	[224]="RMII_RX_ERR",
	[94]="RGB_G0",
	[137]="LCD_B0",
	[88]="RGB_G1",
	[11]="PWM_A",
	[31]="hdmi_rx1_hpd",
	[133]="LCD_B1",
	[83]="RGB_G2",
	[17]="PWM_B",
	[141]="CPH3",
	[129]="LCD_B2",
	[77]="RGB_G3",
	[23]="PWM_C",
	[124]="LCD_B3",
	[72]="RGB_G4",
	[29]="PWM_D",
	[118]="LCD_B4",
	[67]="RGB_G5",
	[144]="SD_D2_A",
	[114]="LCD_B5",
	[92]="TS_D6_A",
	[63]="RGB_G6",
	[188]="FEC_CLK_A",
	[165]="SD_D2_B",
	[110]="LCD_B6",
	[58]="RGB_G7",
	[41]="TS_D_VALID_A",
	[234]="FEC_CLK_B",
	[106]="LCD_B7",
	[97]="SD_D2_C",
	[53]="RGB_G8",
	[166]="JTAG_TDI",
	[51]="SPI_Q_A",
	[49]="RGB_G9",
	[135]="SPI_Q_B",
	[185]="ITU601_VS",
	[170]="JTAG_TDO",
	[139]="SPI_CS_A",
	[154]="SPI_CS_B",
	[52]="TS_SOP_A",
	[252]="TCON_STH1",
	[269]="hdmi_rx2_ddc_scl",
	[266]="hdmi_rx1_ddc_scda",
	[212]="UART_TX_A",
	[70]="TS_D2_A",
	[42]="hdmi_rx2_hpd",
	[40]="NAND_WP_n",
	[210]="ISO7816_CLK",
	[122]="UART_TX_B",
	[45]="NAND_ALE",
	[172]="I2S_OUT_CH2_CH3",
	[157]="RGB_VS",
	[267]="hdmi_rx1_ddc_scl",
	[60]="SPI_D_A",
	[207]="FEC_D4_A",
	[182]="FEC_FAIL_A",
	[131]="SPI_D_B",
	[244]="FEC_D4_B",
	[230]="FEC_FAIL_B",
	[186]="RMII_CLK50_OUT",
	[2]="VGA_VS_0",
	[265]="hdmi_rx0_ddc_scl",
	[18]="VGA_VS_1",
	[189]="ITU601_CLK",
	[147]="STV2",
	[146]="SD_D3_A",
	[98]="TS_D7_A",
	[84]="NAND_IO_0",
	[35]="SPDIF_IN",
	[258]="TCON_CPH1",
	[169]="SD_D3_B",
	[90]="NAND_IO_1",
	[259]="TCON_CPH2",
	[102]="SD_D3_C",
	[96]="NAND_IO_2",
	[101]="NAND_IO_3",
	[105]="NAND_IO_4",
	[109]="NAND_IO_5",
	[113]="NAND_IO_6",
	[117]="NAND_IO_7",
	[191]="FEC_D0_A",
	[236]="FEC_D0_B",
	[192]="ITU601_D0",
	[195]="ITU601_D1",
	[54]="NAND_WEn_CLK",
	[205]="ISO7816_DATA",
	[199]="ITU601_D2",
	[187]="RMII_CLK50_IN",
	[138]="RGB_B0",
	[SIG_GPIOIN]="GPIOIN",
	[SIG_GPIOOUT]="GPIOOUT",
	[SIG_MAX_SIGS]=NULL
};
/* GPIO operation part */
static unsigned pad_gpio_bit[]={
	[PAD_GPIOX_6]=P_GPIO_OEN(0,6),
	[PAD_GPIOD_6]=P_GPIO_OEN(2,30),
	[PAD_GPIOB_2]=P_GPIO_OEN(2,10),
	[PAD_GPIOX_69]=P_GPIO_OEN(2,5),
	[PAD_GPIOX_66]=P_GPIO_OEN(2,2),
	[PAD_GPIOX_51]=P_GPIO_OEN(1,19),
	[PAD_GPIOX_38]=P_GPIO_OEN(1,6),
	[PAD_GPIOX_23]=P_GPIO_OEN(0,23),
	[PAD_GPIOX_63]=P_GPIO_OEN(1,31),
	[PAD_GPIOX_35]=P_GPIO_OEN(1,3),
	[PAD_GPIOX_20]=P_GPIO_OEN(0,20),
	[PAD_GPIOB_8]=P_GPIO_OEN(2,16),
	[PAD_GPIOB_5]=P_GPIO_OEN(2,13),
	[PAD_GPIOX_70]=P_GPIO_OEN(2,6),
	[PAD_GPIOX_57]=P_GPIO_OEN(1,25),
	[PAD_GPIOX_42]=P_GPIO_OEN(1,10),
	[PAD_GPIOX_29]=P_GPIO_OEN(0,29),
	[PAD_GPIOX_14]=P_GPIO_OEN(0,14),
	[PAD_GPIOX_54]=P_GPIO_OEN(1,22),
	[PAD_GPIOX_26]=P_GPIO_OEN(0,26),
	[PAD_GPIOX_11]=P_GPIO_OEN(0,11),
	[PAD_GPIOX_1]=P_GPIO_OEN(0,1),
	[PAD_GPIOD_4]=P_GPIO_OEN(2,28),
	[PAD_GPIOD_1]=P_GPIO_OEN(2,25),
	[PAD_GPIOX_61]=P_GPIO_OEN(1,29),
	[PAD_GPIOX_48]=P_GPIO_OEN(1,16),
	[PAD_GPIOX_33]=P_GPIO_OEN(1,1),
	[PAD_GPIOX_45]=P_GPIO_OEN(1,13),
	[PAD_GPIOX_30]=P_GPIO_OEN(0,30),
	[PAD_GPIOX_17]=P_GPIO_OEN(0,17),
	[PAD_GPIOX_7]=P_GPIO_OEN(0,7),
	[PAD_GPIOX_4]=P_GPIO_OEN(0,4),
	[PAD_GPIOB_0]=P_GPIO_OEN(2,8),
	[PAD_GPIOX_67]=P_GPIO_OEN(2,3),
	[PAD_GPIOX_52]=P_GPIO_OEN(1,20),
	[PAD_GPIOX_39]=P_GPIO_OEN(1,7),
	[PAD_GPIOX_24]=P_GPIO_OEN(0,24),
	[PAD_GPIOX_64]=P_GPIO_OEN(2,0),
	[PAD_GPIOX_36]=P_GPIO_OEN(1,4),
	[PAD_GPIOX_21]=P_GPIO_OEN(0,21),
	[PAD_GPIOB_6]=P_GPIO_OEN(2,14),
	[PAD_GPIOB_3]=P_GPIO_OEN(2,11),
	[PAD_GPIOX_58]=P_GPIO_OEN(1,26),
	[PAD_GPIOX_43]=P_GPIO_OEN(1,11),
	[PAD_GPIOX_15]=P_GPIO_OEN(0,15),
	[PAD_GPIOX_55]=P_GPIO_OEN(1,23),
	[PAD_GPIOX_40]=P_GPIO_OEN(1,8),
	[PAD_GPIOX_27]=P_GPIO_OEN(0,27),
	[PAD_GPIOX_12]=P_GPIO_OEN(0,12),
	[PAD_GPIOX_2]=P_GPIO_OEN(0,2),
	[PAD_GPIOD_2]=P_GPIO_OEN(2,26),
	[PAD_GPIOX_49]=P_GPIO_OEN(1,17),
	[PAD_GPIOX_34]=P_GPIO_OEN(1,2),
	[PAD_GPIOX_46]=P_GPIO_OEN(1,14),
	[PAD_GPIOX_31]=P_GPIO_OEN(0,31),
	[PAD_GPIOX_18]=P_GPIO_OEN(0,18),
	[PAD_GPIOX_8]=P_GPIO_OEN(0,8),
	[PAD_GPIOX_5]=P_GPIO_OEN(0,5),
	[PAD_GPIOD_5]=P_GPIO_OEN(2,29),
	[PAD_GPIOB_1]=P_GPIO_OEN(2,9),
	[PAD_GPIOX_68]=P_GPIO_OEN(2,4),
	[PAD_GPIOX_25]=P_GPIO_OEN(0,25),
	[PAD_GPIOX_65]=P_GPIO_OEN(2,1),
	[PAD_GPIOX_50]=P_GPIO_OEN(1,18),
	[PAD_GPIOX_37]=P_GPIO_OEN(1,5),
	[PAD_GPIOX_22]=P_GPIO_OEN(0,22),
	[PAD_GPIOX_62]=P_GPIO_OEN(1,30),
	[PAD_GPIOB_7]=P_GPIO_OEN(2,15),
	[PAD_GPIOB_4]=P_GPIO_OEN(2,12),
	[PAD_GPIOX_59]=P_GPIO_OEN(1,27),
	[PAD_GPIOX_56]=P_GPIO_OEN(1,24),
	[PAD_GPIOX_41]=P_GPIO_OEN(1,9),
	[PAD_GPIOX_28]=P_GPIO_OEN(0,28),
	[PAD_GPIOX_13]=P_GPIO_OEN(0,13),
	[PAD_GPIOX_53]=P_GPIO_OEN(1,21),
	[PAD_GPIOX_10]=P_GPIO_OEN(0,10),
	[PAD_GPIOX_3]=P_GPIO_OEN(0,3),
	[PAD_GPIOD_3]=P_GPIO_OEN(2,27),
	[PAD_GPIOD_0]=P_GPIO_OEN(2,24),
	[PAD_GPIOX_60]=P_GPIO_OEN(1,28),
	[PAD_GPIOX_47]=P_GPIO_OEN(1,15),
	[PAD_GPIOX_32]=P_GPIO_OEN(1,0),
	[PAD_GPIOX_19]=P_GPIO_OEN(0,19),
	[PAD_GPIOX_44]=P_GPIO_OEN(1,12),
	[PAD_GPIOX_16]=P_GPIO_OEN(0,16),
	[PAD_GPIOX_9]=P_GPIO_OEN(0,9)
};
